|By JCN Newswire||
|May 30, 2014 02:15 AM EDT||
The award ceremony is scheduled to be held on July 8, 2014, at the Hotel Okura Tokyo.
Today, the world's top supercomputers are massively parallel computers with processors connected to up to tens of thousands of nodes. In massively parallel computers, if there is a failure in any of the compute notes, the failed nodes are isolated and the operation of the system is maintained, but the isolation method affects overall system performance and availability. In conventional node structures, pre-partitioned meshes are connected by switches, and when there is a failure, each partition that includes a failed node will be isolated. However, as a result, nodes that have not failed are also included in the isolated partitions, leading to a decline in system availability.
To overcome this problem, Fujitsu invented high-dimensional interconnect technology that does not employ partitioning switches. This technology enables failed nodes to be circumvented, no decline in the level of parallelism that can be executed, and a high level of system availability to be maintained. This technology is being used in the K computer, which interconnects 88,128 nodes, and which was named the world's top-performing supercomputer in the 37th and 38th editions of the TOP500 List(3) of the world's top supercomputers in 2011. In addition to the K computer, this technology is employed in the PRIMEHPC FX10, which is deployed in academic institutions and corporations around the world and is also being used in the successor model of the PRIMEHPC FX10, which is currently under development.
- Imperial Invention Prize: Yuichiro Ajima, Senior Architect, Next Generation Technical Computing Unit
- Imperial Invention Prize: Tomohiro Inoue, Manager, Next Generation Technical Computing Unit
- Imperial Invention Prize: Shinya Hiramoto, Next Generation Technical Computing Unit
- Distinguished Service Prize for Employment of Invention: Masami Yamamoto, President and Representative Director
About the High-Dimensional Interconnect Technology
This invention is comprised of a predetermined number of nodes that are grouped together on a grid, with the groups linked together using a torus connection configuration. A torus is a structure in which multiple groups are connected in a ring configuration, with the rings connecting different groups combined in a grid. With this invention, the partitioning of the group can be positioned where one chooses. Since the partitioned units are small, a variety of parallel programs can be simultaneously executed with excellent efficiency. In this configuration, partitioned switches are unnecessary, while the increase in dimensionality has the effect of increasing the number of connection ports, which are all communication paths that contribute to computational performance. In addition, failures can be isolated not only at the level of individual partitions, but within the partitions as well. In the event of isolation within a partition, a virtual loop connection is used for the seamlessly uninterrupted pathway between the rings connecting the groups and the grid structure within individual groups.
Figure 1 depicts an application example of this invention. In this application example, which is called 6-dimensional mesh/torus, the three dimensions of X, Y, and Z depicted in the figure are the rings that connect groups, and the three dimensions of A, B, and C are the grid structures within the groups. In this example, the size of the grid structure within the groups is 2 nodes (A) x 3 nodes (B) x 2 nodes (C). Figure 2 depicts an example of a node failure that has been isolated within a partition. When the size of the grid structure within a group is three or more nodes, even if one node fails within the group, a seamlessly uninterrupted pathway can be maintained that circumvents the failed node.
As a result of this invention, Fujitsu's supercomputers are equipped with highly flexible partitioning functions, enabling a variety of parallel programs to be executed simultaneously.
About the National Commendation for Invention
The National Commendation for Invention, which is funded by Imperial Grants received every year from the Imperial Household, is held with the objective of contributing to progress in science and technology and the advancement of industry in Japan by commending individuals for their exceptional achievements, including both the creators of inventions and designs as well as the individuals responsible for fostering and implementing these inventions. The Imperial Invention Prize, which is the top prize, is awarded to the inventors behind the invention that is deemed to be the most outstanding.
- Innovative "6-Dimensional Mesh/Torus" Topology Network Technology
- Fujitsu Technical Computing
(1) Invention of 6-dimensional interconnect technology
Patented (Patent No. JP5212469)
(2) K computer
The K computer, which was jointly developed by RIKEN and Fujitsu, is part of the High-Performance Computing Infrastructure (HPCI) initiative led by MEXT. It is a 10 petaflop-class supercomputer, and its availability for shared use began in September 2012.
 Top500 List
A project that periodically ranks the 500 fastest supercomputers in the world.
About Fujitsu Limited
Fujitsu is the leading Japanese information and communication technology (ICT) company offering a full range of technology products, solutions and services. Approximately 170,000 Fujitsu people support customers in more than 100 countries. We use our experience and the power of ICT to shape the future of society with our customers. Fujitsu Limited (TSE: 6702) reported consolidated revenues of 4.4 trillion yen (US$47 billion) for the fiscal year ended March 31, 2013 For more information, please see www.fujitsu.com.
Source: Fujitsu Limited
Fujitsu Limited Public and Investor Relations www.fujitsu.com/global/news/contacts/ +81-3-3215-5259
Copyright 2014 JCN Newswire. All rights reserved. www.japancorp.net
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