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GaN-on-Silicon Substrate Patent Investigation




NEW YORK, Aug. 19, 2014 /PRNewswire/ -- Reportlinker.com announces that a new market research report is available in its catalogue:

GaN-on-Silicon Substrate Patent Investigation


The report provides essential patent data for GaN on Silicon substrate related to main material issues such as dislocation density reduction and stress management for preventing crack generation and warpage of the wafer.

It identifies more than 50 holders of GaN-on-Si related intellectual property.

It provides in-depth analysis of key technology segments and key players including:

-Time evolution of patent publications and countries of patent filings.
-Current legal status of patents.
-Ranking of main patent applicants.
-Joint developments and IP collaboration network of main patent applicants.
-Key patents.
-Granted patents near expiration.
-Relative strength of main companies IP portfolio.

The report also provides an extensive Excel database with all patents analyzed in the report with technology segmentation.

This database allows multi-criteria searches:

Patent information
- Patent publication number
- Hyperlinks to the original documents
- Priority date
- Title
- Abstract
- Patent Assignees
- Technological segments
- Legal status for each member of the patent family

Technological segments
- Buffer type
- Defect reduction
- Stress management
- Non/Semi polar
- (001)-oriented silicon substrate
- Layer transfer technology
-Overview of patent litigations.
-Matrix applicants/technology issues for more than 20 companies.

A special focus is provided on key issues and approaches:

-Buffer type
-Defect reduction
-Stress management
-Non/Semi polar
-(001)-oriented silicon substrate
-Layer Transfer Technology

The "GaN-on-Si IP" profiles of 15 major companies is presented, with key patents, technological issues, litigations, licenses, partnerships, IP strength and IP strategy.
The authors p6
Scope of the report p7
Key features of the report p9
Objectives of the report p11
Terminologies for patent analysis p13
Methodology p15
Patent search strategy p17
Technological segmentation p18
Executive summary p19

GaN-on-Si technology overview p35
GaN on Si: technological challenges and known solutions p36
> GaN-on-Si: growth technique overview
> GaN on Si template & epiwafer: manufacturing steps
> GaN on Si epitaxy challenges: overview
> Si surface preparation
> Prevention of the melt-back etching
> Different types of buffer layers
> Crack and wafer bow due to TCE mismatch
> Stress managements
> Dislocation in GaN-on-Si system
> Dislocation reduction
> 3D to 2D transition
> SiNx in situ masking for dislocation control

Si and GaN orientations p50
> Silicon substrate orientation
> GaN structure orientation
> Non-polar & semi-polar GaN: main interests
> Semi-polar and non-polar GaN on Si

GaN on Si engineered substrates p55
> Engineered substrate via Smart Cut™
> Engineered substrate players: Soitec (FR)
> Engineered substrate players: AmberWave Inc. (US)
> Engineered substrates: conclusion

GaN-on-Si patent investigation p63
Patent landscape overview p64
> Time evolution of patent publications (epitaxial layer & layer transfer)
> Country of patent filings (epitaxial layer & layer transfer)

Patent landscape overview: Epitaxial Layers p67
> Time evolution by country of filing
> Current legal status of patents
> Main patent applicant ranking
> Time evolution of patent applicants
> Country of filing for patent applicants
> Summary of applicant's patent portfolio
> Leadership of patent applicants
> Mapping of current IP holders
> Current legal status of patent portfolio
> Impact of patent portfolios
> IP Blocking potential of applicants
> Potential future plaintiffs
> Patent applicant IP network
> Main IP collaborations
> Main patent litigations

Patent landscape overview: Layer Transfer p87
> Time evolution by country of filing
> Current legal status of patents
> Main patent applicant ranking
> Time evolution of patent applicants
> Country of filing for patent applicants
> Patent applicant IP network
> Main IP collaborations

Analysis of technology segments p95
> Technology breakdown of patent filings
> Matrix applicants/technology segments
> Patent Differentiation for Defect/stress issues
> Current legal status of patents – Breakdown by technology segment
For all segments: overview, time evolution of patent publications, main patent applicants, time evolution of patent applicants, patent assignee IP network, granted patents near expiration, key patents.
> Buffer type
- Al-containing single layer
- Al-containing superlattices
- Others type of buffer
> Defect reduction
- 3D-2D transition (ELOG, pendeoepitaxy, nanomasking, growth conditions)
- Buffer engineering
- Other techniques
> Stress management
- Stress compensation layer (AlN-based interlayer, buffer engineering)
- Patterned substrate
- Compliant substrate
- Other techniques
> Non-polar GaN
> GaN on (001)-oriented Si

Summary of key players p150
For all of them: patenting activity, patented technologies,
key patents, granted patents near expiration, partnerships,
IP strength.
> Azzurro (p151), Dowa (p152), International Rectifier
(p153), LG (p154), Mitsubishi (p155), NGK Insulators (p156),
Nitronex (p157), Panasonic (p158), Samsung Electronics
(p159), Sharp (p160), Soitec (p161), Sumitomo (p163),
Toshiba (p164), Toyoda Gosei (p165), Toyota (p166)

Conclusion p167

GaN-on-Si market overview p169
> Comparison between different GaN-based technologies
> GaN-on-Si industry context
> Overview of the GaN-on-Si industry: from lighting to power electronics
> Possible competing technologies for GaN- on-Si
> LED qualified die surface: forecast by application
> GaN LED on Si penetration forecast
> GaN devices in power application: 2010-2020 market size, split by application
> GaN could reach 7% of the overall power device market by 2020 in the best case
> GaN-on-Si epiwafers will reach 1.6% of the overall power
substrate volume by 2020…
> 6" GaN-on-Si epiwafer: suggested price evolution on the open market
> 2013-2020 6" GaN-on-Si epiwafer volumes: open + captive market
> Mapping of open market players
> LED makers positioning
> GaN power device manufacturers
> The pro/cons of various GaN-on-Si substrate procurement
as perceived by device makers
> Buying or making GaN-on-Si epiwafer?: LED applications
> Buying or making GaN-on-Si epiwafer?: Power applications
> Buying or making GaN-on-Si epiwafer?: RF applications

Latest news 188


Companies Mentioned

Academic Sinica, Advanced Optoelectronic Technology (AOT), Advanced Technology Materials (ATMI), Amberwave Systems, Aonex Technologies, Applied Materials, Arizona University, ASAHI, Azzurro, Bosh, Bridgelux, CEA, CNRS, Corenergy, Corning, Covalent Materials, Cree, Dowa, EpiGaN, Epistar, Formosa Epitaxy, Freescale, Fuji Electric, Furukawa, Hitachi, Honeywell, IMEC, Institute of Semiconductors (Chinese Academy of Sciences), IQE, International Rectifier, Industrial Technology Research Institute (ITRI), Japan Radio, Korea Electronics Technology Institute (KETI), Korea Photonics Technology Institute (KOPTI), Lattice Power, LG, Macom, Micron, Mitsubishi, Nagoya Institute of Technology, Nanchang University, NanoCrystal, NanoGaN, National Institute of Advanced Industrial Science and Technolgy (AIST), NEC, NGK Insulators, National Institute for Materials Science (NIMS), Nitronex, North Carolina State University, Nippon Telegraph and Telephone (NTT), OMMIC, OSRAM, Panasonic, Philips Lumileds, Plessey, Power Integrations, Research Foundation of SUNY, Samsung Corning, Samsung Electronics, Samsung Electro-Mechanics (SEMCO), Sanken Electric, Sanyo, Shanghai Institute, Sharp, Showa Denko, Silicon Genesis (SiGen), Silicon Technology, Soitec, Sony, SUMCO, Sumitomo, Sun Yat Sen University, TDK, Tohoku Techno Arch, Toshiba, Toyoda Gosei, Toyota, Transphorm, Translucent, TriQuint, TSMC, University of Bath, University of California, University of Changchun, University of Electronic Science and Technology of China (UESTC), University of Florida, University of Magdeburg, US Air Force, US Army, US Department of Energy, US Navy


To order this report: GaN-on-Silicon Substrate Patent Investigation


Contact Clare: [email protected]
US: (339)-368-6001
Intl: +1 339-368-6001


SOURCE Reportlinker

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